01/19/2012

Hima has expanded its "HI Matrix" product family to include four new CPU. The new systems have been specifically designed for use in applications that require very high speed or high availability, or run on highly complex networks. It allows the assembly of fully redundant "safe ethernet" networks.

As with current standard HI Matrix systems, the systems F60 CPU 03, F35 03, F31 03 and F30 03 are programmed with the engineering tool "SIL worx. The new CPU versions with enhanced performance, as well as the standard CPU versions, are now available for supply. The I/Os specifications for the standard and the new HI Matrix systems are identical. The enhanced new systems include 'reload', 'sequence of events recording' and 'multitasking' features, and allow the assembly of fully redundant safe ethernet networks.

The 'reload' feature can be used to extend plants and perform modifications during operation. The application program can be updated without disrupting the application during its operation. The 'sequence of events recording' feature, which allows the definition of up to 4000 different events for each system, ensures quick detection and elimination of failure causes. Improved efficiency of the HI Matrix system is ensured by the 'multitasking' feature, which enables the definition of program-specific cycle times.

The new HI Matrix systems have a basic cycle time of 2 ms, i. e., the program is about 10 times faster than before. Also, more memory is available for pro-grams and data (a total of 5 MB) as well as for "Com User Task" (CUT). Two MAC addresses can be defined for each system, enabling the processor and the communication modules to have their own IP address. The four Ethernet ports of the new systems can be split exactly as required in the appli-cation. These advantages allow the building of fully redundant safe ethernet networks integratable with HI Max systems, and to realize 128 redundant safe ethernet connections with up to 1100-byte data exchange.

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